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ADMS is a code generator that converts electrical compact device models specified in high-level description language into ready-to-compile c code for the API of spice simulators.
Repository migrated to:
https://github.com/Qucs/ADMS
For checkout do:
git clone https://github.com/Qucs/ADMS.git
This is a simple CPU design, written in Verilog, intended for educational purposes. The objective is to provide a simulatable processor where the sourcecode exposes concepts in CPU microarchitecture.