Search Results for "java open source projects"

Xschem is a schematic capture program, it allows to create a hierarchical representation of circuits with a top down approach . By focusing on interconnections, hierarchy and properties a complex system (IC) can be described in terms of simpler building blocks. A VHDL, Verilog or Spice netlist can be generated from the drawn schematic, allowing the simulation of the circuit. Key feature of the program is its drawing engine written in C and using directly the Xlib drawing primitives; this...

A Java Native Interface (JNI) library suitable for communicating with a range of USB interface chips from FTDI via the D2XX driver. It currently supports OS X 10.10+ and Windows 7/8 x64. On OS X, the 64 bit JVM is supported. On Windows, support is limited to the 64 bit JVM (Java 1.8 is now 64 bit). Version 1.0 --------------------------------- - Java 8 - SPI support and sample (via MPSSE)

Powerful Verilog Preprocessor. PLP stands for Perl Pre-processor. Perl is used as "control language" that is embedded in the Verilog code (or any other code) to generate code on the fly. It is used commonly as a Verilog pre-processor but can be used with any target/output language (C, C++, Java, VHDL, plain text etc)

Libraries, documentation, examples & drivers for Eagle Technology South Africa's Data Acquisition products. These include ISA, PCI, PCI Express, USB, Serial & Ethernet. Supported languages will be C/C++, JAVA, Perl, Python.

During the period from 1990 through 2002, EPRI funded the development of a Lightning Protection Design Workstation (LPDW), which was used by many utilities to assess the lightning performance of distribution lines. Since about 2002, this program has not been available. EPRI decided to release the simulation kernel of LPDW under an open-source license (GPL v3), so it may be incorporated into IEEE Flash and other projects. OpenETran can presently simulate multi-conductor power lines, insulators, surge arresters, non-linear grounds, and lightning strokes. It efficiently calculates energy and charge duty on surge arresters, and iterates to find the critical lightning current causing flashover on one or more phases. ...

This project has been moved to bitbucket.org: - https://bitbucket.org/vahidi/jbdd/wiki/Home - https://bitbucket.org/vahidi/jdd/wiki/Home It includes two libraries for working with decision diagrams: - JBDD: a Java interface to two popular BDD libraries, CUDD and BuDDy - JDD: a native Java library supporting BDD, Z-BDD

This project has moved to http://sourceforge.net/projects/ngspice-ext.

ECL is a system-level specification language for HW/SW designs and is based on Esterel and C. The ECL compiler parses ECL, writes Esterel and C, and uses the Esterel compiler to produce an implementation. Originally developed at Cadence Berkeley Labs.

Projeto para controle da porta paralela em Linux. Este projeto pode ser utilizado como integrador em projetos de robotica ou automação industrial. Funciona na console e permite integração com diversas linguagens como java/php/c++ entre outras.

Currently, all existing formal tools are designed to serve as formal verifiers, using one implementation or another. JTLV is a new tool aimed to facilitate and provide a unified framework to the development of formal verification algorithms.

The SESAME (Simulation of Embedded System Architectures for Multilevel Exploration) software system is an embedded system co-simulation environment and research tool which implements the ideas of the SESAME project at the University of Amsterdam.

XML is one way to transfer a Printed Circuit Board (PCB) data base between Software Applications. This projects starts with an export from PCB123 and creates a Kicad brd file.

ODog

Currently, all existing formal tools are designed to serve as formal verifiers, using one implementation or another. NO tool is providing a global framework to develop algorithms. Silicis is a new formal framework for designing [verification] algorithms.

IVI is a graphical, interactive user-interface to various Open-Source HDL simulators. IVI is transitioning to using the Eclipse application framework.

GNU PIC LIBRARY PROJECT The interest of this project is to develop a set of Libraries that are released in LGPL License to use to PIC microcontroler programming. Then any program resulted by this use would be a proprietary or free softwares.

Virtual electronic circuit simulation with JAVA based schematic entry and wave viewer, based on (Berkeley) SPICE, for any OS/Server/Browser configuration. Due to missing public feedback for over one year its status is set to INACTIVE (1/2004) - sorry.

This is a very simple simulator for the Microchip PIC16C71. I've used it for various small projects. It has an option video display feature to simulate a software-generated video output, which I used to debug PIC-Pong.

Labcoat for SuperWikia Alpha fabrication manages new or revised fabrication processes. Its 'Cleanroom' applets allow codesmiths to access the lab environment, used to create semiconductors, substrate prototypes, chipset instruction blocks and other Labcoat projects. Our extensions in future releases will include UML support for C#/C++ conforming projects, import/export architecture schematics and refactoring sub-projects.

PCB plugin for rat selection. The user supplies a pin list via a text file. The plugin selects the rats which connects the listed pins. This functionality intends to help auto-routing with variable track width. See the web site for more detail.

This project aims at providing Open Source tools for the development and the verification of SystemC/TLM (Transaction Level Modeling) IP models, and at promoting their use by embedded software developers on SoC (System-On-Chip).