Search Results for "code block"

...It supports standard and custom symbol libraries. It supports PCB layout programs with several netlist formats and can also produce SPICE simulation netlists. It is also often used to draw one-line diagrams, block diagrams, and presentation drawings. The source code for TinyCAD is now on GitHub: https://github.com/matt123p/TinyCAD Online documentation can be found here: https://github.com/matt123p/TinyCAD/wiki

**CODE MOVED TO GITHUB: https://github.com/bitextor ** Bitextor is an application created to generate translation memories using multilingual websites as a corpus source. It downloads an entire website and applies a set of heuristics (based mainly on HTML tag structure and text block length) to find bitexts.

- - - T H I S P R O J E C T M O V E D T O G I T H U B - - - A framework for the implementation of advanced real-time control systems which uses signal/block-based schematics (like Simulink) extended by several features like state machines and online-exchangeable sub-simulations. Besides, this framework properly handles multiple threads, their communication, allows to synchronise control systems to external events (e.g. variable timers or incoming network packages) and provides...

The "GeneticCode" C++ class is designed to generate versions of the genetic code subject to the requirements of the three major models of the genetic code origin and evolution (about these models see, e.g., Koonin & Novozhilov, 2009, IUBMB Life). This class was written specifically to perform statistical test for the paper Makukov & shCherbak (2017), but it might be used for a wider class of studies related to the genetic code.

...ASTERIX defines the structure of the data to be exchanged over a communication medium, from the encoding of every bit of information up to the organisation of the data within a block of data - without any loss of information during the whole process. More about ASTERIX protocol you can find here: http://www.eurocontrol.int/services/asterix Source code is available at: https://github.com/CroatiaControlLtd/asterix

Digital Signal Processing Block Diagram Compiler - user extendable to all DSP's, but presently supports only the TI C2000 family. Rich support for fixed point arithmetic, both saturated and unsaturated. Block diagram entry is via TinyCAD (included).

GEZEL is a cycle-based hardware description language. The GEZEL tools offer stand-alone - and cosimulation, and code-generation into VHDL code. User-defined library-block extensions in C++ allow to add new cosimulation/cosynthesis interfaces.