Search Results for "computer simulation software"

GoogleTest is Google's C++ mocking and test framework. It's used by many internal projects at Google, as well as a number of notable projects such as The Chromium projects, the OpenCV computer vision library, and the LLVM compiler. This GoogleTest project is actually a union of what used to be two separate projects: the old GoogleTest and GoogleMock, an extension of GoogleTest for writing and using C++ mock classes. Since they were so closely related, they were merged to create an even...

NOTE: This project is marked with 'Status: Abandoned' on SourceForge because not enough time can be dedicated to this project. However it may still get sporadic commits to the repository. eCxx is a library for AVR and NodeMCU tailored for micro LED displays and lighting effects. eCxx is utilizing Makefile build system. Java and Python based applications/tools are also included to ease the development and debugging process using the host PC. On one side, eCxx supports the original...

Agglo is a CASE (Computer Aided Software Engineering) or AGL (Atelier Génie Logiciel), whose aim is to facilitate installation ans use of various tools (either existing opensource tools, or agglo tools), in several facets of project development: - requirements management - unit tests - automated integration tests - toolkit for various languages (cpp, c, python, shell, xsl) other facets are to come ultimately: - coverage tests - planification - integration with hudson - code quality analysis - indicator production

SystemC Network Simulation Library (SCNSL) is an extension of SystemC to allow modelling packet-based networks such as wireless networks, ethernet, fieldbus, etc. As done by basic SystemC for signals on the bus, SCNSL provides primitives to model packet trasmission, reception, contention on the channel and wireless path loss. The use of SCNSL allows the easy and complete modelling of distributed applications of networked embedded systems such as wireless sensor networks, routers, and...

lsperf is an utility listing performance of various computer components.

FAST is an Analysis and Simulation Toolbox (FAST) for Fuel Cells (FC) FAST-FC is the doctorate work of David B. Harvey and was developed with support from the U.S. DOE, Ballard, and Queen's University. Derivative works of FAST-FC include FC-APOLLO which is a forked branch of this project intended to capture the code state at the exit of the funded DOE project. FAST-FC is the open and active community branch. FAST-FC is developed and maintained by the original creator and...

Seagull is a multi-protocol traffic generator. Especially targeted towards IMS, Seagull supports Diameter (RFC3588 and all applications) over TCP/SCTP and IPv4/IPv6 , TCAP (over SS7 or Sigtran), XCAP over HTTP and Radius.

SCHEDuler SIMULAtor (originally sched_sim) is a simple C++ event driven simulator of scheduling policies (single processor). Currently supported scheduling policies are: FIFO, LIFO, EDF, LST, RM, DM.

Ships Clock will ring a bell on every half-hour in the style of the standard ship's clock used for centuries on sailing ships around the world and still used in the world's navies today.

SafeBox is intended to be a next-generation debugger/profiler/analyzer for programs running in user space. It will include arquitecture simulation to allow advanced features like monitoring or restricting API use. Extensible using plug-ins.

Hardware Simulation and Vitualization Environment: Unfortunately I have lost my source code in a freak accident (My roommate dropped a bed onto my laptop) for this project. Please be patient and visit http://devsoft.ath.cx/crisis for more information.

Artifical World simulator, it simulate virtual 3D world and execute IA programs. It have API for programming IAs in C++. it use Irrlicht as 3D engine.

The Distributed Real-time Embedded Analysis Method (DREAM) is a tool and method for the real-time verification and performance estimation of distributed real-time embedded (DRE) systems. Publications: http://www.ics.uci.edu/~gabe/publications.html.

USB JTAG Interface

InPUT offers a descriptive and programming language independent format and IoC (Inversion of Control) container for the configuration and design of computer experiments. Code and more info can be found on github: http://github.com/feldob/InPUT

BP-Sim allows users to perform an extensive range of tests across the chain of payment services and thus identify potential causes of failures before launching payment systems into production. BP-Sim consists of following modules: BP-Source, BP-Host, BP-HSM and BP-SeeEMV. BP-Source and BP-Host are payment transaction simulators supporting formats as: APACS30, AS2805, many ISO8583 dialects, IFSF, SPDH, TCMP. Together with industry-standard cryptography, multi-platform support, configurable...