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    Loan management software that makes it easy.

    Ideal for lending professionals who are looking for a feature rich loan management system

    Bryt Software is ideal for lending professionals who are looking for a feature rich loan management system that is intuitive and easy to use. We are 100% cloud-based, software as a service. We believe in providing our customers with fair and honest pricing. Our monthly fees are based on your number of users and we have a minimal implementation charge.
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    Simplify Purchasing For Your Business

    Manage what you buy and how you buy it with Order.co, so you have control over your time and money spent.

    Simplify every aspect of buying for your business in Order.co. From sourcing products to scaling purchasing across locations to automating your AP and approvals workstreams, Order.co is the platform of choice for growing businesses.
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  • 1

    Free VHDL Parser with Java, Python and T

    IEEE VHDL-93 LRM supported parser implemented in Java, APIs Python/Tcl

    This parser has been developed for those who wants to develop his/her own tool around VHDL RTL. Only synthesizable subset of VHDL is supported and it may not work for machine/tool generated VHDL files. This parser has been developed in Java in order to make it platform independent. It reads RTL and populates its internal object model. There are APIs to extract the design information from the database, APIs to elaborate the design along with expression evaluation capabilities. This tool has...
    Downloads: 0 This Week
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  • 2
    IP-XACT 2009/2014  Platform

    IP-XACT 2009/2014 Platform

    Smart GUI/Commandline tools to create IP-XACT( 2009/2014) files

    ...One can create IP-XACT Component, Design or Registers by importing Ip in System Verilog/Verilog-95/VHDL, instantiate Bus Interfaces with proper port maps and attributes as needed. Smart GUI to create IP-XACT Registers, Memory Maps, Address Blocks for IP- has feature to import XLS or Verilog . It has Tcl/Python API support. ipxact2verilog - Generate Verilog module from IP-XACT definition ipxact2vhdlentity - Generate VHDL entity from IP-XACT Component definition verilog2ipxact - Generates IP-XACT definition from Verilog modules vhdl2ipxact - Generates IP-XACT definition from VHDL source ipxactcoherencycheckerverilog / ipxactcoherencycheckervhdl - Validates IP-XACT Component definition with RTL validateipxact - IP-XACT Linting tool
    Downloads: 6 This Week
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  • 3

    Free Parsers for Liberty UPF SDC VCD

    Free Liberty, UPF, SDC and VCD Parsers with Python, Java and Tcl APIs

    Downloads: 1 This Week
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  • 4
    CircuiTikZ Generator

    CircuiTikZ Generator

    This software is a tool for designing electronic circuits using LaTeX.

    This software is a tool for designing electronic circuits using LaTeX. With an intuitive graphical interface, you can create complex circuits quickly and easily, while the LaTeX code generator translates your designs into code compatible with the LaTeX circuitikz library.
    Downloads: 1 This Week
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  • The Most Powerful Software Platform for EHSQ and ESG Management Icon
    The Most Powerful Software Platform for EHSQ and ESG Management

    Addresses the needs of small businesses and large global organizations with thousands of users in multiple locations.

    Choose from a complete set of software solutions across EHSQ that address all aspects of top performing Environmental, Health and Safety, and Quality management programs.
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  • 5

    LaSolv

    Solves symbolic electrical AC circuit equations

    In electrical engineering, AC circuits are often used in the design process. However, deriving the gain, input impedance or what have you is tedious and error prone. LaSolv takes a SPICE like description of your circuit and solves for whatever parameter you specify- voltage gain, trans-impedance, input impedance, etc.
    Downloads: 2 This Week
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  • 6
    eavref

    eavref

    A tool for low-power CMOS voltage reference designs

    EAVREF is a computer-aided tool for robustly designing ultra-low-power CMOS voltage references. The tool is compatible with the powerful Ngspice simulator, enabling open-source microelectronics design flow with SkyWater 130nm Technology.
    Downloads: 4 This Week
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  • 7
    Baya - SoC Integration Platform

    Baya - SoC Integration Platform

    Best in class SoC Integration Platform, IP-XACT, Verilog VHDL, UPF

    1. Comes with 200+ high level Tcl commands around SoC platform assembly 2. Easy to start - use the verilog2baya tool to convert existing SoC/SS into Baya 3. Adhoc and Interface based connections 4. Autoconnections 5. Rule based connections between component ports 6. A variety of SoC integration Methodologies 6.a. XLS/CSV Based connections 6.b. Port-to-Port Adhoc connections 6.c. IP-XACT and System Verilog Interface based connections 6.d. ... 7. Maintains a connectivity...
    Downloads: 0 This Week
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  • 8

    System Verilog Parser IEEE 1800 LRM

    IEEE LRM compliant System Verilog Parser in Java with Python, Tcl API

    This parser has been developed to help users to implement their Verilog tool/utility on the top this library. It reads RTL and populates its internal data structures. There are APIs to extract the design information from the database, there are APIs to elaborate every element of the design along with basic expression evaluation capabilities. It has been bundled as an executable JAR file along with a sample application which reads a RTL file(s), elaborates and dumps it back to show the...
    Downloads: 0 This Week
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  • 9
    StockLab

    StockLab

    Electronic Component Inventory for Linux and Windows Systems

    This program is a lightweight inventory software that allows you to track the number of components in small electronics labs and create order lists for missing or unavailable parts. It is written in Python and runs on PyQt6. Knowing your inventory status before starting a project helps prevent unpleasant surprises. Github: https://github.com/shampuan/StockLab
    Downloads: 0 This Week
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    Skillfully - The future of skills based hiring

    Realistic Workplace Simulations that Show Applicant Skills in Action

    Skillfully transforms hiring through AI-powered skill simulations that show you how candidates actually perform before you hire them. Our platform helps companies cut through AI-generated resumes and rehearsed interviews by validating real capabilities in action. Through dynamic job specific simulations and skill-based assessments, companies like Bloomberg and McKinsey have cut screening time by 50% while dramatically improving hire quality.
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  • 10
    GLogic

    GLogic

    A logic gate simulator for linux developed with Gtk and python.

    GLogic is a logic gate simulator for linux and an adaptation of the gLogic package....
    Downloads: 5 This Week
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  • 11
    FreeCAD-PCB

    FreeCAD-PCB

    Import your PCB boards to FreeCAD

    [ENG] Mod FreeCAD-PCB allow you to import PCB boards to FreeCAD. Scope of mod: - support for many different layers, - possible to choose colours, transparency and names for each layer, - mod allows you to import IGES models with colours, - possible to show holes/vias independent. [PL] Moduł FreeCAD-PCB pozwala na importowanie płytek PCB do programu FreeCAD. Możliwości modułu: - wsparcie dla wielu różnych warstw, - wyświetlanie otworów, przelotek niezależnie od siebie, -...
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    Downloads: 7 This Week
    Last Update:
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  • 12
    dvkit

    dvkit

    Eclipse-based IDE for design verification tasks

    DVKit provides an Eclipse-based integrated development environment (IDE) for common design-verification tasks, such as developing SystemVerilog, C++, TCL, Python, and shell code
    Downloads: 1 This Week
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  • 13
    My Beaglebone Black Project
    The Beaglebone Black project presented here is a software written by Python and Qt and is intended to show the simple control of inputs and outputs (GPIO), the graphic course of input signals GPIO, the configuration and sending and receiving of data via the UART interfaces, the display of the PIN configuration of the Beaglebone Black and the graphic display of the signal course at the analog inputs. The software runs on the BBB under Debian 8.9 and on Linux computers (as a demo). ...
    Downloads: 0 This Week
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  • 14

    pyGerber2Gcode

    Python Gerber to G-code converter

    pyGerber2Gcode is a Pyhon based simple Gerber to G-code converter.
    Downloads: 3 This Week
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  • 15

    dxf2pcb

    Convert DXF drawings of circuit boards to gEDA-PCB files.

    This Python script reads in a DXF (ascii) file and generates a PCB output compatible with PCB Designer, part of the gEDA suite. It is designed for two purposes: One is to generate a PCB snippet from a mechanical drawing (such as a board outline), the other is to produce element files from CAD drawings. PCB snippets are easily imported into an existing gEDA-PCB project using File -> Load Layout to Buffer.
    Downloads: 1 This Week
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  • 16
    O.N.O.S

    O.N.O.S

    Open Network Object System

    ...Open source , simple to use , no need to know any programming language , you can add your programs easy , it runs bash command!every linux system will run it , portable . No installation required! just copy the folder where you want, connect your arduino to the usb and run the python program on the pc.
    Downloads: 0 This Week
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  • 17

    DEVSIM

    TCAD Device Simulator

    TCAD Device Simulator. DEVSIM is a semiconductor device simulation software, using the finite volume method. This software solves partial differential equations on a mesh. The Python interface allows the user to specify their own equations.
    Downloads: 0 This Week
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  • 18
    Qfsm

    Qfsm

    A graphical Finite State Machine (FSM) designer.

    A graphical tool for designing finite state machines and exporting them to Hardware Description Languages, such as VHDL, AHDL, Verilog, or Ragel/SMC files for C, C++, Objective-C, Java, Python, PHP, Perl, Lua code generation.
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    Downloads: 43 This Week
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  • 19
    MyHDL is a Python package for using Python as a hardware description and verification language.
    Downloads: 1 This Week
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  • 20
    This (Python) tool allows you to easily create FPGA bitfiles for your embedded system, from several Open Source IPs (compatibles with the OpenCores Wishbone bus) . It will also generates the corresponding drivers (currently only Linux ones).
    Downloads: 0 This Week
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  • 21
    Libraries, documentation, examples & drivers for Eagle Technology South Africa's Data Acquisition products. These include ISA, PCI, PCI Express, USB, Serial & Ethernet. Supported languages will be C/C++, JAVA, Perl, Python.
    Downloads: 0 This Week
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  • 22
    A IC/MEMS layout editor. Features: all angle, font generator, macros, boolean operations, design rule checker, supported formats:Calma GDSII, OASIS (Open Artwork System Interchange Standard), OpenAccess, DXF, CIF (Caltech Intermediate Form), ...
    Downloads: 7 This Week
    Last Update:
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  • 23
    CAPLET

    CAPLET

    GDS visualization and parallelized capacitance extraction

    Project CAPLET is a capacitance extraction toolkit that extract capacitance at field-solver accuracy. CAPLET can directly handle GDS2 layout files into capacitance matrices in both GUI and command line interfaces. The internal extraction algorithm is specialized for VLSI interconnect structures but not exclusively, as long as the structure is of Manhattan geometry and embedded in a uniform dielectric material.
    Downloads: 0 This Week
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  • 24
    An active filter design assistant. Electrical engineers can use it to design and simulate analog active filters.
    Downloads: 0 This Week
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  • 25
    sigrok
    The sigrok project aims at creating a portable, cross-platform, Free/Libre/Open-Source signal analysis software suite that supports various device types, such as logic analyzers, MSOs, oscilloscopes, multimeters, LCR meters, sound level meters, thermometers, anemometers, light meters, dataloggers, function generators, power supplies, GPIB interfaces, and more.
    Downloads: 0 This Week
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