Search Results for "fpga"
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10 projects for "fpga" with 2 filters applied:
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The AI coach for teams, built on validated assessments.Give managers and teams proactive, contextual coaching to lead effectively, communicate clearly, and navigate real work situations as they happen.
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The Receptionist for iPad | the Original Visitor Management SystemThe Receptionist for iPad is visitor management software that allows users to calm the chaos of the front office. Our digital check-in solution is customizable to your needs; from your company branding, to configurable buttons and drag-and-drop-design badge printing. Effectively manage and track everyone who comes to your workspace and store the information securely in the cloud: no more paper visitor log!
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Chipyard
An Agile RISC-V SoC Design Framework with in-order cores
Chipyard is a framework and generator for constructing custom RISC‑V SoC hardware. Built at UC Berkeley, it leverages Chisel/FIRRTL to generate full-stack systems—from CPU cores to peripherals—and includes simulators, FPGA deployment tools, and integration with Rocket Chip and other RISC‑V ecosystems. -
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XLS
XLS: Accelerated HW Synthesis
...The compiler lowers DSLX into a rich intermediate representation, applies aggressive optimization and scheduling passes, and can either JIT the design for software simulation or emit Verilog for FPGA/ASIC flows. A key idea is “software-style” iteration: fast, deterministic simulation via the JIT encourages test-driven development and property checking before committing to RTL. XLS also provides tooling for pipelining, state insertion, and formal equivalence checks between different stages, giving developers confidence as designs evolve. ... -
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ALCHA
A New Programming Language for FPGA Projects
ALCHA aims to reduce FPGA project develop time by means of automation and abstraction, but without loosing the low-level control that HDLs, such as Verilog, provides. It will support an object oriented programming model, abstract data and signal types, and compile-time scripting. -
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Rocket Chip
Rocket Chip Generator
Rocket Chip is a parameterized RISC-V SoC generator written in Chisel that produces synthesizable RTL for a wide range of cores and configurations. At its heart is the Rocket core, a simple, in-order, five-stage RISC-V implementation, but the generator composes much more: coherent caches, MMUs, interrupt controllers, and buses via the TileLink interconnect. A diplomacy framework (LazyModules) lets designers wire components with negotiated parameters, enabling reuse and rapid exploration of... -
B2i offers full-service IR websites, widgets and pluginsB2i Technologies provides the most robust and versatile tools to manage your Corporate website, Investor Relations website and email communications. Our Investor Relations Software solutions work through automation and implements into existing systems with ease in only a few steps. Our solutions not only help you stay compliant but save valuable time while reporting and delivering critical financial data and press release activities to investors. B2i's Investor Relations Solution provides highly reliable and customizable data for corporate websites including press releases, stock data, charting, and SEC filings within SOX compliance standards. Our investor relations software displays real-time data on your website without requiring additional work on your behalf. Once you have completed your filings and press releases they are automatically loaded onto your website and formatted for easy access.
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Wheefun Computer Prototyping Kit
A Toolkit for Designing Computers
...In addition to a strong core, WFCPK will also include modules emulating various processors (e.g., the MOS 6502 and the Zilog Z80) as well as the Video-Audio Interface (a custom VGA-compatible display and audio controller). The VAI is designed to fit within an FPGA to be integrated into real designs. This library is licensed under the GPLv3 but also includes the classpath exception so that proprietary software can be linked against it required. -
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MatlabSimulink2CPP
Demo of Simulink to C++ C or HDL FGA for HFT potential
Video and files download for Visual trading idea to C++ or FPGA HFT Meetup File download sample: test model (Matlab 2014b with Visual Studio 2013 C++ project generated) Powerpoint MATLAB SIMULINK http://quantlabs.net/blog/2015/04/video-and-files-download-for-visual-trading-idea-to-c-or-fpga-hft-meetup/ -
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PHDL
An HDL alternative to PCB graphical schematic capture tools.
...We have created an eclipse plugin version of the tool as well as a standalone command-line based version. Both function identically and output a netlist that can be imported into a pcb layout tool. VHDL revolutionized how FPGA designs and digital logic circuits have been designed and captured and overcame many of the difficulties associated with the use of schematic editing tools. We believe the use of an HDL is also the way of the future when it comes to PCB design. The PHDL compiler automatically supports the output of PADS and Eagle netlists, and through extending a simple java class, users can generate a netlist in practically any format required by their choice of a layout tool. -
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Writing Testbenches for FPGA/ASIC design is always a very fastidious and boring task. This project helps any FPGA/ASIC designer by providing a full RTL test environment with C support.
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xilprg is a Xilinx FPGA/PROM/CPLD JTAG programmer tool for Win32/Linux. Supports Parallel III cable, Digilent USB. cblsrv is a Open-Source CableServer for Xilinx Impact.
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Easily build robust connections between Salesforce and any platformLike having Postman inside Salesforce! Declarative Webhooks allows users to quickly and easily configure bi-directional integrations between Salesforce and external systems using a point-and-click interface. No coding is required, making it a fast and efficient and as a native solution, Declarative Webhooks seamlessly integrates with Salesforce platform features such as Flow, Process Builder, and Apex. You can also leverage the AI Integration Agent feature to automatically build your integration templates by providing it with links to API documentation.
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This project aim to develop a suite of tool to ease the development of ASIC/FPGA solution. The final program should be an IDE enabling the creation and specification of a project from it's start to finish.
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